圖書標籤: SystemVerilog 集成電路 verification Verification 驗證平颱 計算機 係統硬件 Verilog
发表于2024-11-24
System Verilog for Verification pdf epub mobi txt 電子書 下載 2024
New! Expanded! Updated!
Based on the bestselling first edition this extensively revised second edition includes the relevant changes that apply to the 2008 version of the SystemVerilog Language Reference Manual (LRM). Significant changes include:
* The revision of nearly every explanation and code sample
* The inclusion of new chapters: "A Complete SystemVerilog Testbench" with a complete constrained random testbench for an ATM switch and "Interfacing with C" on the DPI (Directed Programming Interface)
* The addition of 70 new examples including larger ones such as a directed testbench at the end of chapter four
* An expanded index with 50% more entries and cross references
"As digital integrated circuits relentlessly march towards a billion transistors and beyond, Verilog testbenches are running out of steam. With logic verification taking more effort than design, moving to a higher level of abstraction is the only choice. SystemVerilog appears to be the winner in the high-level verification language market and "SystemVerilog for Verification" is the book that will take working professionals and students alike from basic Verilog to the sophisticated structures needed to verify large and complex designs."
Ronald W. Mehler, Professor of Electrical and Computer Engineering, California State University Northridge
"It can be difficult to improve upon a great book, but Chris has achieved that goal - the second edition of this book is even better than the first!
The explanations of abstract verification constructs are more detailed, and many more comprehensive examples make it easier to see how to apply SystemVerilog in object-oriented verification. The new chapter on the SystemVerilog Direct Programming Interface (DPI) is a very valuable addition. This second edition is a must-have book for every engineer involved in Verilog and SystemVerilog design and verification. The book serves well both as a general SystemVerilog reference and for learning object-oriented verification techniques. This book is such an invaluable reference, that my company includes a copy as part of the student training materials with every SystemVerilog verification course we teach!"
Stuart Sutherland, SystemVerilog Training Consultant, Sutherland HDL, Inc.
Chris Spear is a Verification Consultant for Synopsys, and has advised companies around the world on testbench methodology. He has trained hundreds of engineers on SystemVerilog’s verification constructs.
Testbenches are growing more complex. You need this book to keep up.
Includes nearly 500 code samples and 70 figures.
Written for:
Hardware and software engineers in electronic design
Keywords:
* Spear
* SystemVerilog
* methodology concepts
* testbenches
* verification
用systemverilog做驗證的人必讀。有軟件OO知識(C++或JAVA)的人更容易上手。 可以做為參考手冊,但是更多細節需要看標準。
評分用systemverilog做驗證的人必讀。有軟件OO知識(C++或JAVA)的人更容易上手。 可以做為參考手冊,但是更多細節需要看標準。
評分作者有點挫,廢話太多
評分要特彆推薦一下這本書,sv入門就是它,清晰明瞭。有中文版,翻譯得還能看,可搭配一起食用。
評分用systemverilog做驗證的人必讀。有軟件OO知識(C++或JAVA)的人更容易上手。 可以做為參考手冊,但是更多細節需要看標準。
anyone who can thoroughly understand this book can become the expert of sv verification.
評分anyone who can thoroughly understand this book can become the expert of sv verification.
評分the best book of introducing verifcation using SV. It is worth taking a careful look. And you should run all the codes by yourself with VCS/NC/modelsim
評分anyone who can thoroughly understand this book can become the expert of sv verification.
評分anyone who can thoroughly understand this book can become the expert of sv verification.
System Verilog for Verification pdf epub mobi txt 電子書 下載 2024